Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.
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Updated
Dec 15, 2025 - Verilog
Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.
A collection of free educational materials, most of which are interactive or 3D animated. (See README below). You may find inspiration for measurement techniques here. They may improve your comprehension of STEM topics & even writing.
Silicon-proven INT8 systolic NPU (8×8 MAC array) taped out on SkyWater 130nm via LibreLane. Features a custom 32-bit ISA, UART–APB host interface, and fused streaming datapath. Validated on chest X-ray pneumonia detection. Silicon Sprint 2026 — AUC.
Logarithmic DAC for AY8913 and SN76489 programmable sound generators (Done as part of Zero To ASIC Analog course)
RISC-V ASIC design reference
Connectome-constrained circuit synthesis: the fly giant-fiber escape reflex as exhaustively verified NAND/LATCH netlists
Rule110 Cellular Automata ASIC for Tiny Tapeout 05
GDSII & OASIS layout parsing and WebGL2 rendering for the browser — the engine behind the GDS Lens VS Code extension
TapeAPI: a signed receipt for every AI call. Signed, verifiable APIs, AI usage receipts, MCP tools and end-to-end encrypted channels for TapeOut containers (BNB Chain, X Layer, Base). TAP-11 merged as Draft; more TAP drafts under review. Idea credit: @Theairresearch.
Beginner-friendly, Docker-based starter kit for designing a GF180MCU chip from RTL to a manufacturable GDSII — simulate, verify, and harden a working example, then make it yours and submit it to a wafer.space shuttle.
Tapeout Object Format (.tapeout) - flat-text hardware integration contract (parser + emitter)
To associate your repository with the tapeout topic, visit your repo's landing page and select "manage topics."