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arm64: dts: qcom: talos: Mark USB controllers as dma-coherent - #1261
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Mark the USB30_PRIM (usb@a600000) and USB20_SEC (usb@a800000) DWC3 controllers on Talos as dma-coherent. Without this, USB DMA transfers are incorrectly routed through the SWIOTLB bounce-buffer path causing a synchronous external abort during USB hub enumeration on boot. CRs-Fixed: 4664233 Upstream-Status: Pending Signed-off-by: Jeff Thomas Pampackal <jthomasp@qti.qualcomm.com> Change-Id: Ie7d3f44aec0667aca2ca9602ca773cb219b03fb7
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Merge Check Failed: No Change Task Found No associated change tasks found for CR 4664233 on any of the following entities: Entities:
CR: 4664233 Please ensure the CR has a change task associated with at least one of the entities for this branch. |
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Merge Check Failed: CR Not Eligible for Merge CR 4664233 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #1261 — validate-patchPR: #1261
Final Summary
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PR #1261 — checker-log-analyzerPR: #1261
Detailed report: Full report
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Mark the USB30_PRIM (usb@a600000) and USB20_SEC (usb@a800000)
DWC3 controllers on Talos as dma-coherent.
Without this property, USB DMA control-transfer buffers can be routed
through the SWIOTLB bounce-buffer path and trigger a synchronous external
abort during USB hub enumeration on QCS615-Ride.
CRs-Fixed: 4664233
Tracking issue:
qualcomm-linux/meta-qcom#3279